init cpu at cycle 7

src/main.rs

@@ -86,7 +86,7 @@ fn main() -> Result<(), Error> {
     let mut run = true;
     while let Some(event) = events.next(&mut window) {
         if let Some(_) = event.update_args() {
-            // if cpu.regs.pc == 0xEE29  || cpu.regs.pc == 0xEE0E { run = false }
+            if cpu.regs.pc == 0xC6A2 { run = false }
             if run {
                 cpu.clock(&mut bus);
             }

src/nes/cpu.rs

@@ -88,7 +88,7 @@ impl CPU {
         CPU {
             regs: Registers::new(),
             curr_op: 0x00,
-            cycles: 0,
+            cycles: 7,
             cycles_ahead: 0,
             stopped: false,
         }