diff --git a/config/boards/shields/ownkb/ownkb.dtsi b/config/boards/shields/ownkb/ownkb.dtsi
index 2a53ec3..e0ee5ab 100644
--- a/config/boards/shields/ownkb/ownkb.dtsi
+++ b/config/boards/shields/ownkb/ownkb.dtsi
@@ -52,8 +52,4 @@ RC(0,0) RC(0,2) RC(1,2) RC(2,2) RC(3,2) RC(4,2) RC(5,2)                 RC(6,2)
         compatible = "zmk,keymap-sensors";
         sensors = <&left_encoder &right_encoder>;
     };
-};
-
-nice_view_spi: &spi0 {
-  cs-gpios = <&pro_micro 4 GPIO_ACTIVE_HIGH>;
 };
\ No newline at end of file
diff --git a/config/boards/shields/ownkb/ownkb_left.overlay b/config/boards/shields/ownkb/ownkb_left.overlay
index 5917d43..e1d0be7 100644
--- a/config/boards/shields/ownkb/ownkb_left.overlay
+++ b/config/boards/shields/ownkb/ownkb_left.overlay
@@ -27,3 +27,29 @@
 &left_encoder {
     status = "okay";
 };
+
+&pinctrl {
+    spi0_default: spi0_default {
+        group1 {
+            psels = <NRF_PSEL(SPIM_SCK, 0, 20)>,
+                <NRF_PSEL(SPIM_MOSI, 0, 17)>,
+                <NRF_PSEL(SPIM_MISO, 0, 25)>;
+        };
+    };
+    spi0_sleep: spi0_sleep {
+        group1 {
+            psels = <NRF_PSEL(SPIM_SCK, 0, 20)>,
+                <NRF_PSEL(SPIM_MOSI, 0, 17)>,
+                <NRF_PSEL(SPIM_MISO, 0, 25)>;
+            low-power-enable;
+        };
+    };
+};
+
+nice_view_spi: &spi0 {
+    compatible = "nordic,nrf-spim";
+    pinctrl-0 = <&spi0_default>;
+    pinctrl-1 = <&spi0_sleep>;
+    pinctrl-names = "default", "sleep";
+    cs-gpios = <&pro_micro 4 GPIO_ACTIVE_HIGH>;
+};
\ No newline at end of file
diff --git a/config/boards/shields/ownkb/ownkb_right.overlay b/config/boards/shields/ownkb/ownkb_right.overlay
index cba9a1b..3d8923d 100644
--- a/config/boards/shields/ownkb/ownkb_right.overlay
+++ b/config/boards/shields/ownkb/ownkb_right.overlay
@@ -12,22 +12,48 @@
 &kscan0 {
     diode-direction = "row2col";
     row-gpios
-        = <&pro_micro 19 (GPIO_ACTIVE_LOW)>
-        , <&pro_micro 18 (GPIO_ACTIVE_LOW)>
-        , <&pro_micro 15 (GPIO_ACTIVE_LOW)>
-        , <&pro_micro 14 (GPIO_ACTIVE_LOW)>
-        , <&pro_micro 16 (GPIO_ACTIVE_LOW)>
-        , <&pro_micro 10 (GPIO_ACTIVE_LOW)>
+        = <&pro_micro 4 (GPIO_ACTIVE_HIGH)>
+        , <&pro_micro 5 (GPIO_ACTIVE_HIGH)>
+        , <&pro_micro 6 (GPIO_ACTIVE_HIGH)>
+        , <&pro_micro 7 (GPIO_ACTIVE_HIGH)>
+        , <&pro_micro 8 (GPIO_ACTIVE_HIGH)>
+        , <&pro_micro 9 (GPIO_ACTIVE_HIGH)>
         ;
     col-gpios
-        = <&pro_micro 5 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>
-        , <&pro_micro 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>
-        , <&pro_micro 7 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>
-        , <&pro_micro 8 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>
-        , <&pro_micro 9 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>
+        = <&pro_micro 10 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>
+        , <&pro_micro 16 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>
+        , <&pro_micro 14 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>
+        , <&pro_micro 16 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>
+        , <&pro_micro 18 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>
         ;
 };
 
 &right_encoder {
     status = "okay";
 };
+
+&pinctrl {
+    spi0_default: spi0_default {
+        group1 {
+            psels = <NRF_PSEL(SPIM_SCK, 0, 29)>,
+                <NRF_PSEL(SPIM_MOSI, 0, 31)>,
+                <NRF_PSEL(SPIM_MISO, 0, 25)>;
+        };
+    };
+    spi0_sleep: spi0_sleep {
+        group1 {
+            psels = <NRF_PSEL(SPIM_SCK, 0, 29)>,
+                <NRF_PSEL(SPIM_MOSI, 0, 31)>,
+                <NRF_PSEL(SPIM_MISO, 0, 25)>;
+            low-power-enable;
+        };
+    };
+};
+
+nice_view_spi: &spi0 {
+    compatible = "nordic,nrf-spim";
+    pinctrl-0 = <&spi0_default>;
+    pinctrl-1 = <&spi0_sleep>;
+    pinctrl-names = "default", "sleep";
+    cs-gpios = <&pro_micro 19 GPIO_ACTIVE_HIGH>;
+};
\ No newline at end of file